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SoC Design Automation Lab

SoC Design Automation Lab

Jeonbuk National University · Electrical and Electronic Engineering

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Professor

About

SoC 설계 자동화 연구실은 SoC(System-on-Chip) 설계를 연구합니다. 시스템 온 칩의 설계 자동화와 회로 구현 기술을 다룹니다.

Research keywords

SoC 디자인

Selected publications

  • Distributed CRC Architecture for High-Radix Parallel Turbo Decoding in LTE-Advanced SystemsIEEE Transactions on Circuits and Systems II: Express Briefs · 2015
  • A new low-power butterfly unit for single-path delay feedback FFT architecturesIEICE Electronics Express · 2013
  • The ROM Design with Half Grouping Compression Method for Chip Area and Power Consumption ReductionIEICE Transactions on Electronics · 2009
  • A 1-Gb/s flexible LDPC decoder supporting multiple code rates and block lengthsIEEE Transactions on Consumer Electronics · 2008
  • Area and power efficient signal reordering unit for OFDM systemsIEICE Electronics Express · 2008
  • Timed compiled-code functional simulation of embedded software for performance analysis of SOC designIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2003

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