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Ryu Seungtaek Lab

Ryu Seungtaek Lab

KAIST · Electrical Engineering

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Professor

Prof. 류승탁

Professor's page · publications

About

KAIST 전기및전자공학부 류승탁 교수의 Mixed-Signal Integrated Circuits Lab(MSICL)으로, 아날로그·혼성신호 집적회로 설계, 특히 데이터 컨버터(ADC/DAC)를 중점 연구한다. 저전력 A/D 변환 기법, 고속 데이터 컨버터 아키텍처, 오류 보정·캘리브레이션, 합성가능 데이터 컨버터 설계 방법론 등을 다룬다.

Research keywords

Analog/Mixed-mode Integrated Circuit Design

Selected publications

  • A 96.7 dB-SNDR Two-Step SAR-Assisted Hybrid 2-1 MASH Incremental ADC with Automatic Inter-Stage Gain SelectionIEEE Journal of Solid-State Circuits (JSSC) · 2026
  • A 12-bit 1-GS/s Current-Steering DAC with Paired Current Source Switching Background Mismatch CalibrationIEEE Journal of Solid-State Circuits (JSSC) · 2026
  • A 12-bit 600-MS/s Pipelined ADC With Two-Stage High-Gain Dynamic Amplifier in 28-nm CMOSIEEE Transactions on Circuits and Systems I (TCAS-I) · 2025
  • A 25-kHz-BW 97.4-dB-SNDR SAR-Assisted Continuous-Time 1-0 MASH Delta-Sigma ModulatorIEEE Journal of Solid-State Circuits (JSSC) · 2024
  • A 1.5-MHz BW 81.2-dB SNDR Dual-Residue Pipeline ADC With a Fully Dynamic Noise-Shaping Interpolating-SAR ADCIEEE Journal of Solid-State Circuits (JSSC) · 2024
  • SAR-Assisted Energy-Efficient Hybrid ADCsIEEE Open Journal of the Solid-State Circuits Society (OJ-SSCS) · 2024

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